See also PCIe 6.0 Receiver test solution (64 GT/s, 32 GT/s, 16 GT/s, 8 GT/s) for the Anritsu MP1900A BERT (GRL-PXE6-RXA), PCIe 5.0 Receiver test solution (32 GT/s, 16 GT/s, 8 GT/s) for the Anritsu MP1900A BERT and Tektronix and Keysight scopes (GRL-PXE5-RXA), PCIe Transmitter test solution for Keysight and Tektronix scopes (GRL-PXE-TX),
and PCIe PLL Test Automation Solution for the Anritsu MP1900A BERT and Tektronix and Keysight scopes (GRL-PXE-PLL).
Accelerate 128 GT/s PAM4 receiver validation with guided calibration, automated testing and repeatable results.
Overview
Move PCIe 7.0 Base receiver designs from bring-up to specification-aligned validation with software that simplifies stressed-signal calibration and receiver test execution. The solution coordinates supported test instruments, guides users through complex setup steps, and produces consistent, traceable results for next-generation ASIC, IP and system development.
Validate PCIe 7.0 Receivers with Confidence
PCIe 7.0 doubles the raw data rate to 128.0 GT/s and uses PAM4 signaling, leaving tighter voltage and timing margins for receiver validation. Accurate testing requires carefully controlled channel loss, jitter, noise, equalization, and instrument synchronization. This software brings those activities into a guided workflow, helping engineering teams reduce manual setup, improve repeatability, and identify receiver weaknesses earlier in the design cycle.
Product highlights:
- 128 GT/s PAM4 Receiver Testing
- Automated Stressed-Signal Calibration
- Automated BER Testing
- Jitter and Eye Analysis
- Instrument Control & Synchronization
- Engineering Debug & Characterization
- Automated Pass/Fail Evaluation
- Comprehensive Compliance Reporting
- Designed for PCIe 7.0 Rx Validation
Key Features
- Shorten setup time: Use guided procedures to configure the Anritsu MP1900A BERT, any Tektronix or Keysight Real-Time Oscilloscope, fixtures and accessories.
- Improve calibration repeatability: Automate iterative stressed-signal adjustments and reduce operator-dependent variation.
- Find issues earlier: Exercise receiver performance under controlled worst-case signal conditions during silicon and IP validation.
- Increase test throughput: Run repeatable sequences with automated instrument control, data capture and pass/fail evaluation.
- Strengthen traceability: Preserve test settings, calibration data, measurement results, and execution details in exportable reports.
Core capabilities:
- Automated calibration of signal impairments to achieve stressed Receiver Eye Height and Eye Width, in accordance with PCIe Base Specification Revision 7.0.
- Uses Industry Standard tools Seasim and SigTest for stressed signal calibration and stressed-eye characterization
- Automated control and synchronization of supported pattern generation, error analysis and oscilloscope hardware
- TP1 and TP2 calibration workflows, where applicable to the selected test configuration, in a single software framework
- Channel-loss setup and fixture characterization support
- Configuration of PAM4 signal impairments, including jitter and noise parameters supported by the connected instruments
- Receiver test sequencing, error monitoring and result collection
- Reusable test configurations for consistent execution across devices, lanes and test stations
- Detailed reports for review, correlation and post-processing
Streamlined Calibration and Test Workflow
- Connect and verify: Select the device and test configuration, discover supported instruments and confirm connectivity.
- Characterize the path: Apply fixture and channel information to establish the intended receiver test conditions.
- Calibrate the stressed signal: Follow guided steps while the software coordinates measurements and iteratively adjusts supported impairments.
- Run receiver tests: Execute the selected validation sequence with consistent settings and automated result capture.
- Review and report: Inspect calibration status and test outcomes, then export results for engineering analysis and design records.
Designed for Next-Generation Development Teams
Use the GRLPS-PXE7-BASE-RXA software for early receiver bring-up, characterization, design verification, interoperability preparation and specification-aligned pathfinding. It supports teams developing PCIe 7.0 silicon and platforms for AI/ML infrastructure, hyperscale data centers, high-performance computing, cloud systems, high-speed networking, storage and other bandwidth-intensive applications.
Prepare for PCIe 7.0 Receiver Validation
Reduce calibration complexity and build measurement confidence at 128 GT/s. Contact us to discuss your device architecture, test objectives, and compatible instrument configuration, or request a software demonstration.
